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About this scholarly article
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044) - Spatial-temporal mapping of real applications on a Dynamically Reconfigurable Logic Engine (DRLE) LSI by Furuta, K.; Fujii, T.; Motomura, M.; Wakabayashi, K.; Yamashina, M. is a scholarly article available to read on EtoBox.
- Author
- Furuta, K.; Fujii, T.; Motomura, M.; Wakabayashi, K.; Yamashina, M.
- Publisher
- IEEE
- Published
- 2000
- Language
- EN
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