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Low-Power 6T XOR-XNOR Circuit Design by mohanbharath2107 is a document available to read on EtoBox.
What is Low-Power 6T XOR-XNOR Circuit Design about?
This paper analyzes a low-power, high-speed XOR-XNOR circuit designed using a six-transistor (6T) CMOS configuration for VLSI applications. The proposed design demonstrates over 50% improvement in power-delay product compared to existing architectures while ensuring reliable operation and noise immunity. Simulations conducted in 45 nm CMOS technology validate its suitability for integration in various digital systems requiring efficient power consumption and high performance.
- Author
- mohanbharath2107
- Language
- EN