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About this scholarly article
Proceedings of the ASP-DAC 2001. Asia and South Pacific Design Automation Conference 2001 (Cat. No.01EX455) - High-level synthesis under multi-cycle interconnect delay by Jinhwan Jeon, ; Daehong Kim, ; Dongwan Shin, ; Kiyoung Choi, is a scholarly article available to read on EtoBox.
- Author
- Jinhwan Jeon, ; Daehong Kim, ; Dongwan Shin, ; Kiyoung Choi,
- Publisher
- IEEE
- Published
- 2001
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