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Can I read VLSI Chip Design with the Hardware Description Language VERILOG : An Introduction Based on a Large RISC Processor Design on EtoBox?
VLSI Chip Design with the Hardware Description Language VERILOG : An Introduction Based on a Large RISC Processor Design by Prof. Dr. Ulrich Golze (auth.) is a nonfiction available to read on EtoBox.
What is VLSI Chip Design with the Hardware Description Language VERILOG : An Introduction Based on a Large RISC Processor Design about?
This book introduces to modern design of large chips. A powerful RISC processor in the range of a SPARC is apecified in a hardware description language (HDL), it is developed hierarchically and is finally sent as a gate model to the silicon vendor LSI Logic for production. The resulting processor on a semi-custom gate-array chip with more than 50.000 used gates and an efficiency of up to 40 MIPS is tested on an automatic test equipment and a testboard. The book also introduces thoroughly to the HDL VERILOG. The included disk contains more than 40 small and medium sized executable VERILOG examples, the large processor models and the VERILOG simulator VeriWell running on PC or SPARC.
Who reads VLSI Chip Design with the Hardware Description Language VERILOG : An Introduction Based on a Large RISC Processor Design?
It is typically read by self-directed learners exploring a subject in depth.
Common subject areas: history, science, philosophy, social sciences.
- Author
- Prof. Dr. Ulrich Golze (auth.)
- Publisher
- Springer-Verlag Berlin Heidelberg
- Published
- 1996
- Language
- EN
- ISBN
- 9783642610011
- Category
- nonfiction
- Subjects
- Computer Science, Engineering, Hardware
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