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About this Engineering article
Simulation Study of Vertically Stacked Lateral Si Nanowires Transistors for 5-nm CMOS Applications by Al-Ameri, Talib; Georgiev, Vihar P.; Adamu-Lema, Fikru; Asenov, Asen is a Engineering article available to read on EtoBox.
It is typically read by researchers, students, and practitioners in Engineering.
- Author
- Al-Ameri, Talib; Georgiev, Vihar P.; Adamu-Lema, Fikru; Asenov, Asen
- Publisher
- Institute of Electrical and Electronics Engineers; Institute of Electrical and Electronics Engineers Inc.; Institute of Electrical and Electronics Engineers (IEEE) (ISSN 2168-6734)
- Published
- 2017
- Language
- EN
- Field
- Engineering (Physical Sciences)
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