About this document
RISC-V CPU Design Project Specification by pskumarvlsipd is a document available to read on EtoBox.
This document provides specifications for a class project to design a RISC-V processor. It outlines the goals, requirements, and checkpoints for the project which will be completed over two phases - front-end design and back-end implementation. Key aspects covered include the RISC-V ISA, a 3-stage pipeline design, Verilog implementation, and Synopsys synthesis tools.
- Author
- pskumarvlsipd
- Language
- EN