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This document presents a novel hardware architecture for efficient finite-field multipliers used in elliptic curve cryptography (ECC), focusing on FPGA implementations. The proposed overlap-free Karatsuba algorithm (OKA) demonstrates improved design efficiency with reduced combinational delay and area-delay product compared to traditional methods. The study evaluates various multiplication techniques and their performance based on operand sizes, highlighting the advantages of the new approach in terms of sp

Author

Raghav Pulugu

Language

EN