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Low-Power CMOS Transimpedance Amplifier by sruthipraveendran1992 is a document available to read on EtoBox.
What is Low-Power CMOS Transimpedance Amplifier about?
This paper presents a low-power multistage transimpedance amplifier (TIA) utilizing local negative feedback to achieve a wider bandwidth and lower power dissipation compared to conventional designs. Implemented in a 65 nm CMOS technology, the TIA consumes 23.9 mW and demonstrates a gain of 46 dBΩ with a -3 dB frequency of 11.4 GHz. The proposed design incorporates inductive peaking to enhance bandwidth while maintaining a compact area of 366 µm × 225 µm.
- Author
- sruthipraveendran1992
- Language
- EN