About this scholarly article

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044) - Low-power technique for on-chip memory using biased partitioning and access concentration by Kawabe, N.; Usami, K. is a scholarly article available to read on EtoBox.

Author

Kawabe, N.; Usami, K.

Publisher

IEEE

Published

2000

Language

EN