About this scholarly article

Eighth Annual International Phoenix Conference on Computers and Communications. 1989 Conference Proceedings - A bit-level pipelined implementation of a CMOS multiplier-accumulator using a new pipelined full-adder cell design by Lu, F.; Samueli, H. is a scholarly article available to read on EtoBox.

Author

Lu, F.; Samueli, H.

Publisher

IEEE Comput. Soc. Press

Published

1989